Although arithmetic and logic units are well known in data processing systems, it will be helpful to review the features and the terminology that particularly apply to this invention. The unit ordinarily operates on two multi-bit words that will be called A and B or will be designated as [A.sub.0 . . . A.sub.n ] and [B.sub.0 . . . B.sub.n ] to emphasize the individual bit positions of the words and the corresponding stages of the arithmetic and logic unit. The unit has a generally similar stage for each bit position and a generalized stage can be designated as stage i with a stage to the right designated i-1 and a stage to the left designated i+1. Each stage receives the two bits for the corresponding position from the two data words, A.sub.i and B.sub.i and it receives control signals that define the desired one of several arithmetic and logic operations. This arithmetic operation is addition. Subtraction, multiplication and division are performed in part by addition and are not directly relevant in this description. The usual logic functions are Exclusive OR, AND and OR.
For addition, each stage produces an output called the sum, and it also produces an output that is called a carry (or carry out) that is supplied to the next stage (where it is called a carry in). The sum bits form a multi-bit output and the high order carry signal forms a high order sum bit or an overflow bit but does not ordinarily otherwise appear as an output. When the unit performs a logic function, the multi-bit output appears on the same lines as the sum output. The unit also typically includes a shifter that permits shifting the output to the right or left.